A split-foundry asynchronous FPGA B Hill, R Karmazin, CTO Otero, J Tse, R Manohar Proceedings of the IEEE 2013 Custom Integrated Circuits Conference, 1-4, 2013 | 48 | 2013 |
An asynchronous FPGA with two-phase enable-scaled routing C LaFrieda, B Hill, R Manohar 2010 IEEE Symposium on Asynchronous Circuits and Systems, 141-150, 2010 | 35 | 2010 |
Automatic obfuscated cell layout for trusted split-foundry design CTO Otero, J Tse, R Karmazin, B Hill, R Manohar 2015 IEEE International Symposium on Hardware Oriented Security and Trust …, 2015 | 32 | 2015 |
ULSNAP: An ultra-low power event-driven microcontroller for sensor network nodes CTO Otero, J Tse, R Karmazin, B Hill, R Manohar Fifteenth International Symposium on Quality Electronic Design, 667-674, 2014 | 19 | 2014 |
A Bit of Analysis on Self-Timed Single-Bit On-Chip Links J Tse, B Hill, R Manohar 2013 IEEE 19th International Symposium on Asynchronous Circuits and Systems …, 2013 | 4 | 2013 |
Architecture and Synthesis for Dynamically Reconfigurable Asynchronous FPGAs B Hill | | 2016 |