Stephen E. Richardson

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Mark HorowitzProfessor of Electrical Engineering and Computer ScienceVerified email at ee.stanford.edu
Megan WachsAlumni, Stanford UniversityVerified email at alumni.stanford.edu
Alex SolomatnikovVerified email at sifive.com
Wajahat QadeerDeep VisionVerified email at deepvision.io
Ofer ShachamMajestic Labs AI (Previously Meta, Google and Stanford)Verified email at alumni.stanford.edu
Benjamin C. LeeProfessor, University of PennsylvaniaVerified email at seas.upenn.edu
Christos KozyrakisStanford UniversityVerified email at stanford.edu
Amin FiroozshahianHicamp Systems, Inc.Verified email at hicampsystems.com
Andrew DanowitzAssociate Professor of Computer Engineering, California Polytechnic State UniversityVerified email at calpoly.edu
Rehan HameedPhD Candidate, Stanford UniversityVerified email at stanford.edu
Zain AsgarCo founder @ Startup, Ex-Google Research, Director Engineering, Trifacta.Verified email at stanford.edu
Ardavan PedramStanford UniversityVerified email at stanford.edu
Shahar KvatinskyTechnion - Israel Institute of TechnologyVerified email at ee.technion.ac.il
Jonathan Ragan-KelleyMIT CSAILVerified email at mit.edu
Sameh GalalStanford UniversityVerified email at alumni.stanford.edu
John BrunhaverArizona State UniversityVerified email at asu.edu
Blaine RisterSoftware Developer, FemtosenseVerified email at femtosense.ai
Dejan MarkovicProfessor of Electrical and Computer Engineering, UCLAVerified email at ee.ucla.edu
Kunle OlukotunCadence Design Systems Professor of Computer Science, Stanford UniversityVerified email at stanford.edu

Stephen E. Richardson

Research Associate, Stanford University

Verified email at stanford.edu

Computer Architecture


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Understanding sources of inefficiency in general-purpose chips R Hameed, W Qadeer, M Wachs, O Azizi, A Solomatnikov, BC Lee, ... ACM SIGARCH-Computer Architecture News 38 (3), 37, 2010	742	2010
CPU DB: Recording Microprocessor History: With this open database, you can mine microprocessor trends over the past 40 years. A Danowitz, K Kelley, J Mao, JP Stevenson, M Horowitz Queue 10 (4), 10-27, 2012	299	2012
Programming heterogeneous systems from an image processing DSL J Pu, S Bell, X Yang, J Setter, S Richardson, J Ragan-Kelley, M Horowitz ACM Transactions on Architecture and Code Optimization (TACO) 14 (3), 1-25, 2017	159	2017
Dark memory and accelerator-rich system optimization in the dark silicon era A Pedram, S Richardson, M Horowitz, S Galal, S Kvatinsky IEEE Design & Test 34 (2), 39-50, 2016	155	2016
Rethinking digital design: Why design must change O Shacham, O Azizi, M Wachs, W Qadeer, Z Asgar, K Kelley, ... IEEE micro 30 (6), 9-24, 2010	135	2010
Caching function results: Faster arithmetic by avoiding unnecessary computation SE Richardson Sun Microsystems Laboratories Technical Report SMLI TR-92-1, 1992	119	1992
Exploiting trivial and redundant computation SE Richardson Proceedings of IEEE 11th Symposium on Computer Arithmetic, 220-227, 1993	96	1993
A systematic approach to blocking convolutional neural networks X Yang, J Pu, BB Rister, N Bhagdikar, S Richardson, S Kvatinsky, ... arXiv preprint arXiv:1606.04209, 2016	79	2016
Avoiding game over: Bringing design to the next level O Shacham, M Wachs, A Danowitz, S Galal, J Brunhaver, W Qadeer, ... Proceedings of the 49th Annual Design Automation Conference, 623-629, 2012	61	2012
Method and apparatus for optimizing complex arithmetic units for trivial operands S Richardson US Patent 5,262,973, 1993	60	1993
Interprocedural analysis vs. procedure integration S Richardson, M Ganapathi Information Processing Letters 32 (3), 137-142, 1989	57	1989
Interprocedural optimization: Experimental results S Richardson, M Ganapathi Software: Practice and Experience 19 (2), 149-169, 1989	51	1989
Evaluating programmable architectures for imaging and vision applications A Vasilyev, N Bhagdikar, A Pedram, S Richardson, S Kvatinsky, ... 2016 49th Annual IEEE/ACM International Symposium on Microarchitecture …, 2016	49	2016
Storing data in memory P Keltcher, S Richardson US Patent 6,782,453, 2004	37	2004
A memory system design framework: creating smart memories A Firoozshahian, A Solomatnikov, O Shacham, Z Asgar, S Richardson, ... Proceedings of the 36th annual international symposium on Computer …, 2009	35	2009
Verification of chip multiprocessor memory systems using a relaxed scoreboard O Shacham, M Wachs, A Solomatnikov, A Firoozshahian, S Richardson, ... 2008 41st IEEE/ACM International Symposium on Microarchitecture, 294-305, 2008	35	2008
System and method for a chip generator O Shacham, M Horowitz, S Richardson US Patent 8,966,413, 2015	34	2015
Result cache for complex arithmetic units S Richardson US Patent 5,260,898, 1993	34	1993
Code optimization across procedures S Richardson, M Ganapathi Computer 22 (2), 42-50, 1989	34	1989
Creating an agile hardware design flow R Bahr, C Barrett, N Bhagdikar, A Carsello, R Daly, C Donovick, D Durst, ... 2020 57th ACM/IEEE Design Automation Conference (DAC), 1-6, 2020	31	2020

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