Follow
Florian Giesemann
Florian Giesemann
Verified email at ims.uni-hannover.de
Title
Cited by
Cited by
Year
VLIW architecture optimization for an efficient computation of stereoscopic video applications
G PayŠ-VayŠ, J Martín-Langerwerf, C Banz, F Giesemann, P Pirsch, ...
Green Circuits and Systems (ICGCS), 2010 International Conference on, 457-462, 2010
192010
Performance evaluation of the Intel Xeon Phi manycore architecture using parallel video-based driver assistance algorithms
OJ Arndt, D Becker, F Giesemann, G PayŠ-VayŠ, C Bartels, H Blume
2014 International Conference on Embedded Computer Systems: Architectures†…, 2014
122014
Evolutionary algorithms for instruction scheduling, operation merging, and register allocation in VLIW compilers
F Giesemann, L Gerlach, G Paya-Vaya
Journal of Signal Processing Systems 92 (7), 655-678, 2020
102020
Instruction merging to increase parallelism in VLIW architectures
G PayŠ-VayŠ, J MartŪn-Langerwerf, F Giesemann, H Blume, P Pirsch
2009 International Symposium on System-on-Chip, 143-146, 2009
102009
Using a genetic algorithm approach to reduce register file pressure during instruction scheduling
F Giesemann, G PayŠ-VayŠ, L Gerlach, H Blume, F Pflug, G von Voigt
2017 International Conference on Embedded Computer Systems: Architectures†…, 2017
92017
A comprehensive ASIC/FPGA prototyping environment for exploring embedded processing systems for advanced driver assistance applications
F Giesemann, G PayŠ-VayŠ, H Blume, M Limmer, W Ritter
2014 International Conference on Embedded Computer Systems: Architectures†…, 2014
82014
Application-specific soft-core vector processor for advanced driver assistance systems
S Nolting, F Giesemann, J Hartig, A Schmider, G Paya-Vaya
2017 27th International Conference on Field Programmable Logic and†…, 2017
62017
Exploring Dynamic Reconfigurable CORDIC Co-Processors Tightly Coupled with a VLIW-SIMD Soft-Processor Architecture
S Nolting, G PayŠ-VayŠ, F Giesemann, H Blume
Applied Reconfigurable Computing: 11th International Symposium, ARC 2015†…, 2015
42015
Dynamic self-reconfiguration of a MIPS-based soft-core processor architecture
S Nolting, G PayŠ-VayŠ, F Giesemann, H Blume, S Niemann, ...
Journal of Parallel and Distributed Computing, 2017
32017
Deep Learning for Advanced Driver Assistance Systems
F Giesemann, G Paya-Vaya, H Blume, M Limmer, WR Ritter
Towards a Common Software/Hardware Methodology for Future Advanced Driver†…, 2017
32017
Dynamic Self-Reconfiguration of a MIPS-Based Soft-Processor Architecture
S Nolting, G PayŠ-VayŠ, F Giesemann, H Blume, S Niemann, ...
2016 IEEE International Parallel and Distributed Processing Symposium†…, 2016
32016
A Hardware/Software Environment for Specializing Dynamic Reconfigurable Generic VLIW-SIMD ASIP Architecture
F Giesemann, G PayŠ-VayŠ, H Blume
22012
The DESERVE Platform: A Flexible Development Framework to Seemlessly Support the ADAS Development Levels
F BadstŁbner, R KŲdel, W Maurer, M Kunert, A Rolfsmeier, J Pťrez, ...
RIVER PUBLISHERS SERIES IN TRANSPORT TECHNOLOGY, 9, 2017
12017
TUKUTURI: eine dynamisch selbstrekonfigurierbare Softcore Prozessorarchitektur
F Giesemann
Hannover: Institutionelles Repositorium der Leibniz Universitšt Hannover, 2021
2021
De Zeeuw, Chris I., 137 Deroui, Hamza, 213 Desnos, Karol, 213 Doclo, Simon, 88 Dragic, Leon, 286
G Agosta, MA Aguilar, Z Al-Ars, N Alachiotis, P Alefragis, MAZ Alves, ...
Platform System Architecture–2nd Release
F BadstŁbner, R KŲdel, W Maurer, M Kunert, A Rolfsmeier, J Pťrez, ...
The system can't perform the operation now. Try again later.
Articles 1–16