| Architectural exploration of the ADRES coarse-grained reconfigurable array F Bouwens, M Berekovic, A Kanstein, G Gaydadjiev Reconfigurable Computing: Architectures, Tools and Applications: Third …, 2007 | 153 | 2007 |
| Data-centric computing frontiers: A survey on processing-in-memory P Siegl, R Buchty, M Berekovic Proceedings of the Second International Symposium on Memory Systems, 295-308, 2016 | 96 | 2016 |
| Architecture enhancements for the ADRES coarse-grained reconfigurable array F Bouwens, M Berekovic, B De Sutter, G Gaydadjiev High Performance Embedded Architectures and Compilers: Third International …, 2008 | 93 | 2008 |
| A comparative survey of open-source application-class RISC-V processor implementations A Dörflinger, M Albers, B Kleinbeck, Y Guan, H Michalik, R Klink, ... Proceedings of the 18th ACM international conference on computing frontiers …, 2021 | 87 | 2021 |
| SoCRocket-A virtual platform for the European Space Agency's SoC development T Schuster, R Meyer, R Buchty, L Fossati, M Berekovic 2014 9th International Symposium on Reconfigurable and Communication-Centric …, 2014 | 80 | 2014 |
| Reconfigurable multi-processing coarse-grain array A Kanstein, M Berekovic US Patent 8,261,042, 2012 | 80 | 2012 |
| Instruction set extensions for MPEG-4 video M Berekovic, HJ Stolberg, MB Kulaczewski, P Pirsch, H Möller, H Runge, ... Journal of VLSI signal processing systems for signal, image and video …, 1999 | 80 | 1999 |
| Multicore system-on-chip architecture for MPEG-4 streaming video M Berekovic, HJ Stolberg, P Pirsch IEEE transactions on circuits and systems for video technology 12 (8), 688-699, 2002 | 66 | 2002 |
| Adres & dresc: Architecture and compiler for coarse-grain reconfigurable processors B Mei, M Berekovic, JY Mignolet Fine-and coarse-grain reconfigurable computing, 255-297, 2007 | 63 | 2007 |
| The M-PIRE MPEG-4 codec DSP and its macroblock engine HJ Stolberg, M Berekovic, P Pirsch, H Runge, H Moller, J Kneip 2000 IEEE International Symposium on Circuits and Systems (ISCAS) 2, 192-195, 2000 | 63 | 2000 |
| The MPEG-4 multimedia coding standard: Algorithms, architectures and applications S Bauer, J Kneip, T Mlasko, B Schmale, J Vollmer, A Hutter, M Berekovic Journal of VLSI signal processing systems for signal, image and video …, 1999 | 55 | 1999 |
| IDAMC: A many-core platform with run-time monitoring for mixed-criticality B Motruk, J Diemer, R Buchty, R Ernst, M Berekovic 2012 IEEE 14th International Symposium on High-Assurance Systems Engineering …, 2012 | 46 | 2012 |
| HiBRID-SoC: a multi-core system-on-chip architecture for multimedia signal processing applications HJ Stolberg, M Berekovic, L Friebe, S Moch, S Flugel, X Mao, ... 2003 Design, Automation and Test in Europe Conference and Exhibition, 8-13 …, 2003 | 40 | 2003 |
| Mapping control-intensive video kernels onto a coarse-grain reconfigurable architecture: the H. 264/AVC deblocking filter C Arbelo, A Kanstein, S Lopez, JF López, M Berekovic, R Sarmiento, ... 2007 Design, Automation & Test in Europe Conference & Exhibition, 1-6, 2007 | 36 | 2007 |
| MT-ADRES: Multithreading on coarse-grained reconfigurable architecture K Wu, A Kanstein, J Madsen, M Berekovic International Workshop on Applied Reconfigurable Computing, 26-38, 2007 | 34 | 2007 |
| An SoC with two multimedia DSPs and a RISC core for video compression applications HJ Stolberg, S Moch, L Friebe, A Dehnhardt, MB Kulaczewski, ... 2004 IEEE International Solid-State Circuits Conference (IEEE Cat. No …, 2004 | 34 | 2004 |
| Architecture of a coprocessor module for image compositing M Berekovic, P Pirsch 1998 IEEE International Conference on Electronics, Circuits and Systems …, 1998 | 33 | 1998 |
| A core generator for fully synthesizable and highly parameterizable RISC-cores for system-on-chip designs M Berekovic, D Heistermann, P Pirsch 1998 IEEE Workshop on Signal Processing Systems. SIPS 98. Design and …, 1998 | 27 | 1998 |
| Design and analysis of an ultra-low-power double-tail latched comparator for biomedical applications P Bahmanyar, M Maymandi-Nejad, S Hosseini-Khayat, M Berekovic Analog Integrated Circuits and Signal Processing 86, 159-169, 2016 | 25 | 2016 |
| An evaluation of energy efficient microcontrollers I Tsekoura, G Rebel, P Glösekötter, M Berekovic 2014 9th International Symposium on Reconfigurable and Communication-Centric …, 2014 | 23 | 2014 |
Rolf MeyerUniversität zu LübeckVerified email at uni-luebeck.de
